A micri-controller or a chip operating settings is usually governed by a DVFS (dynamic-voltage/frequency scaling policy) that controls both operating voltage and the frequency. The decision that the policy makes is surely depends on the objective, e.g. is it optimum performance, maximum performance, optimum PDP, etc. Recent DVFS policies concern energy consumption along with the performance. It usually runs in kernel and should be accessible in open source OSes. 

The factors that such policies monitor is usually the internal CPU/MCU unit status, which they obtain from special counters (i.e. search for EMON counters) that keep information such as the utilization of units.

I would also recommend you to have a look at the following publication from IEEE Xplore, or search keyword "DVFS policies".

Conference Paper An integrated approach to system-level CPU and memory energy...

If you will run MCU on lower frequency than it will consume less power and at higher frequency power  consumption will be of higher

Thanks to all for such prompt response.

Akos, you said "Determine which is your most resource-hungry task, and monitor it's execution time. Start experimenting with higher frequencies and make adjustments after if needed". Can you please throw some more light on this?

The selection of appropriate frequency for microcontroller depends on your task requirements. Higher frequency means higher power consumption but also more computation power! So essentially choice of frequency is a trade off between power consumption and required computation power.

Higher working frequency, less execution time, for the work to be carried out, but with less reliability, and more power consumption.....

By running your micro controller out of the specified frequency range you are making your system susceptible to more noise and probably more heating (for a higher frequency range) 

Easier prototyping and final layout design, since lower frequencies imply that the effect of inductance and stray capacitance is lessened. High-speed circuits must necessarily have extremely careful PCB design for this reason.

Lower frequency of 10Mhz and higher frequency of 100Mhz..This is data sheet specified frequency range hence within the limits of the uC.

Is this difference that significant that we should prefer to opt for lower than higher one?

It really depends on what the programming needs to do. If it is all the same e.g. not time critical then using the lower frequency has obvious advantages. In many applications execution time is critical, such as when driving external flash ADCs without a FIFO buffer, or in video processing, and a multitude other applications. What tends to be worrisome is that the microcontroller is not fast enough for the intended task and then the cost aspect comes in due to the need to go up the speed grade.

Can we divide as follows: The time critical task at 100Mhz and less critical at 10MHz. ?

Can this happen continuously i.e the switching back and forth of the frequency.?Will the cost be significant? I mean what will be the implications?

In that case there may be no choice but to run the core at 100 MHz and time down by counter overflow tick interrupts to drive the slower processes. Remember that in most microcontrollers the oscillator needs time to stabilize - anywhere from a few clock cycles to 1024 in the PIC16F for instance. So switching crystals is out of the question. You may want to investigate the use of PLL schemes instead, such as those available on the PIC18F which might allow you to write to a register that effects the change in operating frequency. In any case I am not sure whether using the PLL clock generator in this way eliminates the oscillator stabilization time issue.

If you decrease the frequency, usually you can decrease the supply voltage. This is the only advantage I see in running a microcontroller below the maximum frequency. For exemple the series 78K0 of NEC/Renesas needs a minimum of 4 V to run at 20 MHz but can work at only 1.8 V if the clock frequency is 5 MHz

If you use two oscillators always on or a PLL to obtain the two frequencies from the same source, there would not be a stabilization issue and you can conmute between the two frequencies, but the point here is how often you want to go back and forth to be worth switching between these two frequencies.

Microcontroller performance is directly proportional to clock speed.

Microcontroller power consuming is inversely proportional to clock speed.

Some peripherals need a specific clock frequency that you can achieve only with high frequency. 

If you have designed a system to run at the highest frequency then there is no big advantage in running the same system at a lower frequency. If you do not need the higher speed offered by the higher frequency for your application, design the system to run at a lower frequency, which will reduce system cost.

For example, a microcontroller running at 14.7456MHz has a little less computing power oposite to 16MHz, but has better synchronized UART.

Adarsh, Can you be specific about the device and the datasheet you are talking about. It is better to discus for this particular device and your application requirements that to discuss a general solution.

Thanks!

As I can conclude from discassion, "Calculating power" is sufficient at any freq, isn't it?

So, the next question should be "Power Consumption". There are two part: dinamic and static. For modern uC it has comparable value. Standard optimization policy is to  use burst mode: power up, execute code at maximum speed, then go uC to power down till next event. The dinamic power losses is depend only of you code length (number of instructions - not freq!) while static losses will be reduced in accordance with power down time.

The idea  "Higher working frequency.->.less reliability.->..must necessarily have extremely careful PCB design'' is just a commonly adopted misconception. For example, if your uC is 100MHz capable but actually running at 1Hz you would use 100MHz PCB desing - not 1Hz desing!!! Desing restrictions are coming from dV/dT and  dI/dT capability of output drivers. It depends on uC IC technology only, not from actual freq.

The main advantage of  working at low frequency is low supply current, besides lower RFI. Supply current i = quiescent current + k x frequency. The second term is predominant. The RFI energy of a microcontroller is so small that it is very easy to filter. So if your application needs a fast speed, do not worry about running fast.  But if power consumption is a concern, run as slower as the application allows.

Dear Sir,

use please the low tact frequency for a good EMC. I mean a low electromagnetic field emission.

Yours Sincerely