Hi there
I am trying to connect a resistive ladder network to an 16X1 MUX in Cadence UMC-180nm CMOS process. My MUX is basically made of a transmission gate type. I am unable to obtain the exact voltages at output of the MUX after voltage division from the ladder.
The MUX voltage would be then connected to the input of the comparator. I am looking for exact voltages as obtained in the resistive ladder network
I suppose the impedance matching could be one of the basic reason
Dear Anush,
Welcome,
Since your multiplexer is a transmission gate type, it inserts an effective resistance in the path of the signal to the comparator. If the input impedance of the comparator is relatively low, then the resistive divider network will be upset due to this loading.
There are two solutions;
You have to increase the input impedance of the comparator while decreasing the divider resistances.
or you add abuffer at the input of the comparator or even you can buffer the divider from the multiplexer by buffer amplifier.
Best wishes
Hi,
The CMOS TG is NOT an ideal switch.In the ON state TG exhibits a resistance - several kohms. So, you have designed more complicated resistor divider than you intended ;-)
The solution is very simple. Instead of CMOS TG use so called clocked inverter to build your MUX. Like this one :
https://www.researchgate.net/figure/251832949_fig3_Figure-3-Current-waveforms-comparison-of-CDFF-and-proposed-MSDFF
Regards,
Zekry sir and jawaorski sir
Thank u so much for the replies
Let me try this technique
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