In differential LVDS clock, signals on output pins are equal and opposite in polarity and hence get added at the receiver end. but when I add a AC coupling capacitor to each pin of driver IC to shift the switching threshold at receiver, then one signal at receiver side changes its polarity, hence no more a differential pair. I don't figure it out that how signal polarity get changes with deploying a capacitor. A capacitor is only suppose to change the dc level of signal.
Take my answer with an grain of salt since I'm a software engineer, not an electrical one, but since i'm working in the embedded world, I know 1 thing or 2...
It's not clear for me what do you want to do with your capacitor. By the way, differential purpose is to remove all noises that are on both wires, and that embrace any DC offset. So if the DC offset is the same on both wire, no need to put any capacitor.
More over, it's really a bad idea to mix capacitor on a digital signal because it will "flat" the edges, and it will do a low-pass filter effect that can make your signal disapearring if it's clk freq is too hign, and it will introduce a delay.
Hello,
if your intention is to isolate transmitter and receiver (my best guess) you need capacitors of the appropriate value in BOTH lines. This works - it has been done before - but requires a DC balanced signal line (meaning your clock may not stop at any time). And it may take a bit of time after power-on to settle.
Real-world capacitors are far from ideal and any capacitor does interact with line capacitance, inductance and resistance - being much more than a simple, ideal isolator.
@Dreher
Yeah you are right. Whenever coupling capacitor is added to differential clock net then signal should be DC balanced to alleviate the DC wandering in case of long 1s .
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