My designed folded cascode amplifier is working properly now. But, the phase margin is 93 degree. I need to have phase margin around 70 degree. But, I do not have idea on how to increase the phase margin.
In the attachment, the yellow-circled is the folded cascode op-amp where as the transistors out of the circled area are the biased networks.
Thank you in advance.
Regards.
Your question does not quite make sense. You have 93 degree phase margin which is larger than 70 so I don't understand what is the question. You think you have too much phase margin? Phase margin around 80-85 is generally a good design choice because Process temperature and mismatch will get you closer to 60 degrees, which is what you need to avoid overshoot in your step response.
Dear Norhamiza,
You can increase the phase margin by making a dominant pole nearer to the zero frequency origin. This is accomplished by compensating the op amp through adding a shunting capacitor in the highest impedance node of the amplifier. This is a very well known technique which is used commonly to increase the phase margin. However, this will be on the cost of the amplifier bandwidth. The amplifier bandwidth will be decreased. The other method is by using pole zero compensation, where one adds a zero which cancels one of the poles of the op amp. Again this technique is known and you can consult the relevant literature.
Wish you success
Dear Norhamiza,
I think that your phase margin is fine since it is larger than 60º. This parameter depends on the output load capacitance; if you decrease its value the phase margin will decrease and the tecniques that metion Abdelhalim can be used
I agree with Dr. Zekry's answer. Adding a shunt cap at the highest impedance node is the best approach. Based on the same principle, if you have a multistage configuration, you could use a feed-forward pole-zero compensation technique can be used as well. Attached.
Is there a typo in your question? 93 is already larger than 70. And 70 is typically more phase marging than you need. The trade off is amplifier BW or signal rise time vs stability (gain and phase marging). The way to control phase marging is by the location of poles and zeros in the transfer function. You can do that by analyzing the open loop transfer function in the frequency domain and adding a compensator (zero pole compensator for instance) to add more phase marging. Any feedback control textbook will tell you how to do that. Also Spice and Matlab have toolboxes to help you.
Thank you for all the responses given. I appreciate them very much. The opamp works properly now with the phase margin 65 degree. :)
Although Abdelhalim Zekryis technically right by saying to add "a zero which cancels one of the poles [specifically equivalent second pole] of the op amp", this is not practical. Canceling a pole with a zero is impractical given mismatches so in reality you add a zero slightly above the second equivalent pole to give you a 30 degree or so boost in phase margin. This is called lead compensation.
You might think this is great, why not add zeros everywhere and get a ton of phase margin? The reason is that your system then is no longer a second order system so will have very strange settling time behaviour. Specifically, the step response will take a long time to settle, which for most applications is not practical.
- Badges
- Science topic
- Similar topics
- Engineering
- Control Theory