using Cadence tool we can find average power, total power and peak power. How can we say that the tool is giving correct value? Is there any theoretical analysis for that?
You can do some very basic theoretical calculations for a single transistor and some load on paper. But the tools have the scalability necessary to handle huge circuits. You have to trust them, essentially. They use foundry models that are calibrated from real silicon and can be trusted to a certain extent.
Dear Naga,
I would like to add to the colleagues above, that you want to verify the circuit analysis done by the CADENCE tool.
You can do this by manual analysis of simple circuit. The simplest digital circuit is the inverter. It is analysed in the text books of VLSI circuit design such as VLSI design techniques by Geiger et al. Naturally there are other good text book in CMOS manual analysis.
The simplest analysis can be done considering the two states of the transistor the on state with with a resistance ron and an off leakage current Ioff.
The power dissipated p= pon + poff + pdyn,
where pon is the on power, poff id the off power and Pdyn is the dynamic power
pon= Ion Von, poff= VDE Ioff, pdy= Ion Voff (tr+tf)/4 with tr is the rise time and tf is the fall time. These are approximate relations to estimate the power consumed in CMOS inverter.
Best wishes
For sure you can calculate the power. In your circuit, for sure you did the required DC analysis and you know the amount of DC current running by each transistor. You also know the switching time for each transistor for each clock period over certain operating time. You can then calculate the average power easily.
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