We would like to fabricate an IC which includes various students' research works in TSMC90nm Technology. I have two option, 1)MOSIS 2)IMEC, Which choice would be preferred?
I just have to ask IMEC or MOSIS for an NDA, sign in and in a week I will know all the costs.
From public domain information I can say you that a discount price of a 65 nm UMC technology is 2225€ / mm^2 for a minimum of 4 mm x 4 mm design, for a total minimum of 35600 €.
Cost depends on redesign the whole thing in terms of the structure of the IC itself, what layers you need, how they're interconnected in 2-D and 3-D, chip area, manufacturing process used (and the feature sizes), The number of package pins adds another fixed cost per chip. More than standard that tends to reduce yields driving up the cost of an individual functional chip. Also, quite high cost of producing a chip is part of what has driven the market for FPGA.
The cost of the chip fabrication depends on the cost of the material and the process which use for the fabrication. The fabrication unit is always fabricating a multiple chip of a single logic or operation. So the companies paid the full cost of the silicon wafer. After fabrication the chips on the wafer are tested, then package it. So the cost will be high or low that depends on it.