If the Quasi Fermi level in a semiconductor diode changes then what will be the effects on the voltage across its terminals?
Quasi-Fermi level has no physical meaning. The Fermi level - actually the chemical potential - is an equilibrium concept. For a semiconductor in non-equilibrium (i.e. in the presence of an external force, be it light or applied bias), the quasi-Fermi level is a mathematical tool to calculate n or p at any position x. The quasi-Fermi level separation in the active region of the device, i.e. the difference between the electron quasi-Fermi level EF,e and the hole quasi-Fermi level EF,h, must appear as the developed voltage at the terminals, or vice-versa.
Just to complete the answer above: the output voltage is the difference between the quasi-Fermi level for electrons (in the CB) and holes (in the VB) evaluated at the electric contacts. Quasi-Fermi levels are generally not constant within the semiconductor (due to finite mobility of carriers), so that it would be possible to have quasi-Fermi level split in the interior of the semiconductor without having external voltage (e.g. in short-circuited solar cells).
I think you have the question in the wrong way. It's more like change in voltage causes change in potential in the bulk of the semiconductor, which we can mimic assuming a quasi-Fermi level.
To comment the answer above: actually in the case of light illumination there will be generation of electron-hole pairs disturbing the equilibrium and causing the splitting of Quasi-Fermi levels. If this is the case, the voltage (potential) across the terminals will change. Of course, we normally see the splitting of Quasi-Fermi levels due to the voltage applied at the contacts.
Quasi-Fermi level has no physical meaning. The Fermi level - actually the chemical potential - is an equilibrium concept. For a semiconductor in non-equilibrium (i.e. in the presence of an external force, be it light or applied bias), the quasi-Fermi level is a mathematical tool to calculate n or p at any position x. The quasi-Fermi level separation in the active region of the device, i.e. the difference between the electron quasi-Fermi level EF,e and the hole quasi-Fermi level EF,h, must appear as the developed voltage at the terminals, or vice-versa.
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