i think u can use "HDL coder" in matlab or system generator (SYSGEN) in xilinx...!
I am using DDS IP core to generate two sine waves. Then I am going to use mixer. So that, whole signal is shifted to certain frequency.
Dear Niraj,
There are several ways on doing this. Perhaps, the simplest one is to use a counter. A more advanced and stable way is to use a phase locked loop (PLL) IP core that allows you to specify output frequency relaying on some input one.
Please look at the following link that explains the idea of PLL:
http://www.altera.com/support/devices/pll_clock/basics/pll-basics.html
The most common way to achieve this is using an FFT implementation or Polyphase filtering architectures. From an implementation point of view, the WOLA filter based on an FFT is the most efficient and flexible. The output carriers can be multiplexed into an FDM stream using simple time multiplexers.
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