Barrie, you mean structures with "current on demand"?

Josef

.

Josef:

.

Yes, I would say this topic is about designing circuit structures 

that alleviate the occurrence of transient errors in an amplifier -

whether feedback or otherwise -- due to the limited availability

of signal-dependent currents for charging device- and parasitic

capacitance. The design emphasis will be either on developing

special gm stages having high ratios of peak IOUT to gm, or by

using a radical change of topology.

.

The question is, of course, rhetorical; but I'd like to get students

who may be visiting ResearchGate put on their thinking-caps to

offer their best ideas, and for we old-timers to provide ours.

.

Barrie

Hi Barrie

That might be a good idea.

Josef

Hi Barrie,

My proposal for faster slew rate and lower slew-induced distortions:

- current feedback topology instead voltage feedback

- active gm=1/R  in the first stage without limitation of Iout (Iout=Vin*gm=Vin/R)

Thanks,

Dobri

Barrie - to be honest, I don`understand the real contents of your question (but this may  be due to my limited knowledge of your language). And I am not sure if I am the only one...

'

Dobri:

.

Your two suggestions are at the heart of what has to be

achieved....  but there are lingering issues of design that

need much attention. In the case of the CFA, one needs

to ensure that the basic benefit - that the current needed

for unlimited slewing is supplied through the feedback -

is actually available throughout the signal chain. Further,

there's a lot of current noise at the summing node which

operates on the usual feedback resistance to generate a

large amount of voltage noise at the output.  What might

be done about these lingering problems?

.

In the case of the gm stage that is deliberate made weak

by the introduction of degeneration resistors - a common

technique, and automatic is the case of MOS elements -

the wide-band input noise and VOS are also increased.

.

There are ways of dealing with all of these problems. It

is the purpose of this thread to invite new solutions and

thoroughly discuss them.

.

Clearly, solutions based exclusively on the use of ideal

elements have no place in this thread; and there's little

room for miles of mathematics. These are engineering

problems and need to be solved in engineering ways.

.

Barrie

Thank you Dobri, 

Hi Glen,

Barrie has in mind integrated circuit opamp design ...

But in any case the old audio amplifier QUAD405 (and its variants) is a good example of clever discrete design where crossover distortions, generated in the output class B transistors, are canceled with feed forward connection and balanced bridge.

Attached is QUAD405 schematic.

The bridge consists of C8, R20||R21, R38, L2, and is balanced when L2=R38*(R20||R21)*C8. It is supplied by the crossover distortions of the output stage, and when is balanced, there are no distortions between the output and preamp stage.

Dobri

.

Dobri:

,

Thanks for the schematic of the old Quad. I've never

looked under the hood of this venerable amplifier but

as a younger man I always wished I could afford one.

Now..... well now, I indulge liberally in my audiophilic

passions. But we're still, even in the best of systems,

a long way from fully recovering the ambiance of the

concert hall or the jazz gig, What's missing of course

is the complex three-dimensional phasing that arises

from the walls of the performance environment, and

which actually varies with one's head orientation and

even the clothing of all present, and much else.

,

Now to the meat of the matter. I think the issues of

design for minimizing crossover distortion are quite

distant from those having to do with elimination the

distortion in audio amplifiers, due to the finiteness

of slew rate, which incidentally was given a special

name - Transient Intermodulation distortion (TIM) -

by Otala and Leinolen in 1975 (see attached file in

which they analyzed it by what was, to my mind, an

unnecessarily huge amount of theory) and for which

the first-named later enjoyed a sort of cult following

for many years.

.

But we are well beyond being so negligent today -

or at least we ought to be. So the original question

remains? How do the experts purge their op amps

of this plague? And yes, you are right in asserting

that I have in mind - largely - the design of modern

high-speed integrated circuits.

.

Barrie

.

Attached is the "TIM" paper.

Barrie,

Many thanks for the attached paper.

Yes, the original question remains...

Dobri

.

Okay - so let me put forward some ideas for the design

of gm stages that have significantly extended 'voltage-

capacity' at their input terminals with little consequence

to noise. In using most of these schemes the slew-rate

is still limited by the (total, now distributed) current. But

because the corresponding trans-conductance is much

lowered by this technique, the ratio between slew-rate

and the unity-gain (radian) frequency in a more-or-less

still-classical gm/C-based op amp can be much higher

than the kT/q value I showed in the earlier thread.

.

(If it should seem odd that this ratio has the dimension

of voltage, consider that slew-rate is voltage/time , and

frequency has the dimension 1/time, so leaving voltage

"on the top"  DIM [SR/BW] == V).

.

This design approach can achieve SR/BW ratios of many

times kT/q. I named it the MULTI-tanh technique and it's

described in the attached paper.

.

Barrie

Hi Barrie,

I looked at your article, it is very interesting and "full of math" :-)

I have to read it properly,

Josef

The same is true for an article from the Otala.

.

Josef -- Ho-ho! Caught by the leg!

.

Well, now and again a little mild math is very useful

for bounding the basic properties of an analog cell. I

get disturbed mainly when readers believe the result

of some long analysis that starts out from the wrong,

or more commonly, far too approximate models for

their elements.

.

All results provided in my old paper were first verified

in simulation while concurrently putting the key ideas

into some simple, everyday sort of equations. But it

should be noted that little, if anything was said about

how to cope with the realities of transistor behavior,

especially as influenced by such BJT imperfections

as finite base current, finite internal resistances, the

effects of base charge, and capacitances in general,

on operating speed, and on and on and on.  I left all

the consequential serious confrontation with circuits

in the Multi-tanh class to those who are triggered into

action by "The very idea!"

.

So I regard the paper as a Bouquet of Suggestions.

.

These days, when a paper (or an invited speaker at

our NW Labs), leans too heavily on a mathematical

approach to circuit design, my eyes glaze over; then

I nod off in a doze, still aware of the presentation but

wishing all the time the writer, or speaker, would use

plain language. All to often the heavy equations are

included to let the audience know the presenter is a

Very Smart Guy. It is also often that he or she hopes

to be hired. But later close questioning often causes

those high walls to tumble, revealing all too painfully

that genuine knowledge of relevant technologies is

lacking. We don't hire mathematics majors to design

integrated circuits. It's simply what's in the gut that

really matters.

.

Sorry to be so blunt.

.

 Barrie

Hi Barrie,

Thank you for the useful SR/BW approach.

Because BW=gm/Cc, SR=Ib/Cc, taking the ratio SR/BW=Ib/gm=Veff - effective device drive voltage. Veff=kT/q for BJT, or Veff=Vdsat/2 for MOST.

So, the ratio SR/BW/Veff seems an useful figure of merit.

When I said active gm, I had in mind the concept as in attached picture.

SR will be limited by Iout limitation, because Iout does not depend on bias current Ib. The improvement will be Iout_lim*R/Veff.

Thanks,

Dobri

A question for your students:

Can you always investigate slew rate by means of input- and transfer- step responses for an arbitrary circuit ?

.

Dobri:

.

Yes, the use of emitter degeneration is clearly one possibility

and it is widely used in commercial op amps (and "in-amps")

based on BJT technologies, so as to raise the SR/BW figure

of merit. However, this benefit comes at the expense of very

much higher noise.

.

Now take a look at Fig. 32 of the attached data sheet for the

AD797.  You will see that it has the LOWEST NOISE in the

industry using a simple BJT differential pair, but manages to

achieve excellent dynamic performance at the same time. A

closer look at the SR/BW ratio, however, shows that it is not

any different in this regard to the "classical" op amp form we

have been discussing in this thread -- it is 20e6/(2*pi*110e6),

or 28.9mV - and it actually HAS to be kT/q.

.

Can you see how to break this bond?

.

By the way, it was the ultra low noise of the AD797 that got it

designed into the Long Interferometer Gravity Observatory

(both the one in Washinghton state and the one in Louisiana)

which recently measured an event confirming the existence

of gravity waves, as predicted a long time ago by Einstein.

Barrie

Hi Barrie,

some very elementary descriptions are in

https://www.researchgate.net/publication/282443322_Klasicky_diferencni_vstupni_dil_OZ_-_zakladni_uvahy

in Czech only - but math is everywhere the same :-)

Josef

Research Klasický diferenční vstupní díl OZ – základní úvahy

.

Josef:

.

Yes, this is the basic idea.

.

Barrie

Barrie,

AD797 has noise density 0.9nV/sqrt(Hz). This density corresponds to noise resistance of 1k/(4.07/0.9)2 = 49ohm. Ib=26mV/49=0.53mA.

I can say that the input transistors are running with Ib>0.53mA, or about Ib~1mA.

The floating folded cascode output is tricky.

The key point for speed and noise is the compensation, which is also tricky. There are no Miller multiplication effect, and the two shoulders see equal caps for noise rejection.

CN keeps its charge when the output moves. Very clever design! Congratulations!

Dobri 

And what about this way (OP176)?

Josef:

That is a multi-tanh,

Barrie

I think that  BJT defines "DC properties"  and FET improves a dynamics.

From the graph, we can estimate the course of the transconductance.

Sadly, it seems that no one wants to discuss about interesting analog circuits problems.

Josef, Dobri, Erik, Gurm, and Barrie, 

About thirty days ?  

I hope for good health and good life for us all. 

The value of our self is demonstrated as 

we share our sense of wonder and amazement 

to the community of our students

and improve the world around us. 

One important thing I am learning is that  

Being a Good Apprentice

is a Good Place in life, 

Glen

In reply to Josef:  For me, this has been by far the most interesting thread on RG for a long time, and I've been thinking about slew rate enhancement at odd moments of spare time for a while ... But I haven't come up with anything worth posting yet.  But I hope you'll be encouraged to know some else finds this analog topic interesting!

Hello Barrie, hello Glen, Josef,

Barrie, thank you very much again for the interesting concept of AD797.

If you have in mind other interesting concept, like this, it will be pleasure to discuss.

We talked about VFA, where SR is limited due to limited value of the bias current of diff. pair. If Ib=10uA and Cc=5pF, then SR=2V/us.

I think, we can say something about CFA, where due to CFA topology there is no limitation of Ib. Here are one link about CFA:

Thanks,

Dobri

https://www.digikey.com/Web%20Export/Supplier%20Content/Exar_1016/PDF/exar-aan-3.pdf

By the way, if you have a look again on QUAD405 sch, you should mark that the signal gain of power part is defined by a current feedback.