The answer to your questions would be to implement an ISR that is triggered by the first (resp. every) byte received. Thus you are able to implement a reasonable buffer in RAM. Regarding the idle time: logging the reception time of each byte (via some time base in your ARN) allows for checking an end idle condition as well as a start idle condition: and end idle has to be detected as some timeout condition. For a start idle you are free to choose between a timeout condition (7 transfer times after the reception of the last byte as it would have to cover 'end idle' + 'start idle' or to check the time elapsed at the reception of a new byte. (For the latter you'll have to check for timer wraparounds if long bus idle times may occur.)

Hope this helps

Dear Shaunak.

1. To handle frames of different length, you should better configure RX FIFO to activate an interrupt on each received character (byte).

2. Use timer configured to the "Silent Interval" to detect an end of frame. Each time you receive a character via UART, you should retrigger the timer. If timer fires since the last received character, then the frame is over.

Best regards.

Most UARTS support idle interrupted DMA, I would recommend using this if possible, it will simplify your design, it will accommodate the variable message size and possibly (roughly) satisfy the 3.5 frame idle detection.

As a practical note in my experience many devices don't strictly adhere to the Modbus RTU 3.5 frame specification.

Unless your research is specifically around implementing Modbus I would recommend taking a look at the libmodbus project, it's written in  C and is POSIX compliant so relatively portable.

Take care.

http://libmodbus.org/