Context Switch happens when processes CPU time slice finishes or interruption happens.
Perhaps maintaining a process table that is always up to date? But we must spend time to update this table.
Which type of OS? e.g. desktop OS, server class OS, embedded OS etc.
Depending on that the answer may change a bit.
I understand there are processors on which you can read / write all the registers in a single block of memory. That could help.
I think when the time slice ends, and when there is an interruption (different from the time slice) are two different cases. The context switch which occurs in both cases hardly depends on the underlying hardware (CPU). The context switch depends on the number of registers, etc... In the case of the end of the time slice, the cost of executing the next task (for a time quantum) really depends on the cost of the scheduling algorithm and not only the cost of the context switch. Most of modern CPU can effectively read/write all the registers in a single instruction. This makes difficult to be able to optimize this part at the OS level.
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