I want to ask that why we apply the low values of Vds max 3 to -3 V. and when we apply the back gate voltage we use roughly 40 to -40 V in the I-V characteristics of FET.
If you are measuring commercial FETs be aware that they often - especially if they are power FETs - contain a backwards diode from collector to emitter. This will prevent you from reverse biassing the device and risking damage.
Probably you have a research FET with back gating having a big distance between the channel and backgate electrode, in this case a comparable electric field strength for channel control achieved by much higher voltage.
its depend upon your oxide thickness. If you have thick oxide layer you can sweep more than 60 V back gate. large the back gate, greater will be the chance to have large on/off ratio.
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