Hi Lambada Puneeth Raj ,

You are being deceived by an inaccurate and incomplete model. There are two capacitances associated with the diode, D: 1) the depletion/junction/transition capacitance, Cj, which only exists when the diode is zero or reverse biased; and 2) the diffusion capacitance, which stores the minority carrier charge, but only exists when the diode is forward biased. These two capacitances are both in parallel with the diode. Note the caveat given in the diagram: "assuming linear capacitances". That is referring to the fact that Cj should actually be written as Cj(V) because it is a nonlinear function of the reverse voltage difference across the diode.

When the MOSFET is turned on, it shock excites the LCR circuit into a damped oscillation. The circuit oscillates because of L and C, and it is a dampled oscillation due to the load resistor R. In order to prevent a negative voltage difference from appearing across the load R, a clamping diode D is in the circuit. When the damped oscillation attempts to reverse direction, the clamping diode becomes forward biased and essentially stops the oscillation.

Now, as you mentioned, when the MOSFET is turned off, its Cds is charged to the voltage difference, vg. The clamping diode, D, will have its diffusion capacitance charged to a value somewhat less than vg, depending on the degree of damping from the load R, when the damped oscillation attempts to reverse direction. {NOTE, I misspoke. Obviously the forward voltage drop of the diode D cannot be greater than 0.7 VDC, if it is a silicon diode, and so the diffusion capacitance can't have a forward voltage drop grreater than 0.7 VDC < vg. So you are correct that the turn on transient losses are smaller than given in the formula shown in your diagram.} At this point, the MOSFET is turned on, again, discharging Cds, and reverse biasing diode D which discharges its diffusion capacitance - not its diffusion/transition/junction capacitance.

There is a lot being left out of the description of the boost converter.

Regards,

Tom Cuff

Hello All and Lambada Puneeth Raj ,

I had to make a correction to my original post. The correction is bolded in the original post. I apologize.

Regards,

Tom Cuff

Hello all and Lambada Puneeth Raj,

several years ago I made a test with converters for different voltages. The efficiency was not as expected, until I used at least three wires in parallel for the coils. The skin-effect was already at 50 kHz strong enough and the circuit improved for efficiency for appr. 3 percent. The higher the frequency, the higher the losses by the skin effect.

Hope that helps too

Karl Prodinger

Thomas Cuff sir, thank you for your response. Your reasoning is pretty clear. I am attaching you the pictures and the explanation he has provided in the textbook. Here he has clearly mentioned that "the reverse bias diode exhibits junction capacitance". I did not get the part where he says "During the switching transitions these two capacitances are effectively in parallel, since the dc source Vg is effectively a short-circuit at high frequency." . I really didn't understand what did he mean by saying that the voltage source acts as short circuit at higher frequency. And here he is talking about depletion capacitance (instead of diffusion capacitance). At turn on, depletion capacitance get charged right? I don't know what piece of information am I misinterpreting here. Please explain his point of view to me sir.

Hello to all,

here the text:

"During the switching transitions these two capacitances are effectively in parallel, since the dc source Vg is effectively a short-circuit at high frequency."

I would interprete these words as a description of the impedance of the source, not drawn in the diagram. Usually one needs some capacitors at the source, as a high-frequency converter needs stable conditions for switching. That means, switching on the transistor, the input has a very low impedance, like zero, in reaction to the switching frequency. The rest is a chain of capacitors via the transistor and the diode - and producing some losses, specially in the transistor, as it short-circuits the charge in the reverse diode (not shown in the diagram). Seen as a problem at higher frequencies, the author is right by seeing the capacitances as parallel. The capacitors at the input are usually 1000 times the values of the transistor and the diodes.

Perhaps the newer switching elements like Ga-As or SiC have better values and can reduce these charging losses.

Best regards to all

Karl

Karl Prodinger sir thank you for the response. It makes sense when we think of a voltage source is bypassed with a capacitor to keep the voltage level stable. But he should have mentioned that the diffusion capacitance is being discharged but he instead mentioned that it is the depletion capacitance that is getting discharged. Any idea why that is the case sir? By reverse diode u mean the body diode of mosfet right?

Hello Lambada Puneeth Raj ,

As shown in the circuit diagram, the DC voltage source, Vg, is an ideal voltage source. That implies it has no internal resistance, i.e., you can drawn as much current as you want without the output voltage difference sagging. It also implies that there are no parasitic reactive elements present inside the source such as inductances or capcitances. Thus, the only thing inside an ideal DC voltage soucre is simply an ideal source of EMF (Electro-Motive Force).

If you were to measure the internal resistance of this ideal voltage source it would be 0 Ω, and likewise the impedance would also be zero in magnitude with a zero phase angle. For these reasons, any AC signal encountering the DC ideal voltage source 'sees' it as a dead short, i.e., a piece of ideal wire.

Of course, any real DC voltage source (battery or power supply) will possess both an internal resistance (you can't drawn a million amperes from a flash light dry cell), and it will invariably have some reactive elements present as well. The thing to understand is that the lecturer is not talking about real DC voltage sources. See the following book for a brief discussion of voltage and current sources.

[1] M. E. Van Valkenburg; Network Analysis, 3rd Ed.; Prentice-Hall, Inc.; 1974; pp. 36-37.

Now on to your main question about the capacitances associated with the MOSFET and the clamping diode, D. After the MOSFET is turned on, the clamping diode, D, is reverse biased, and so the relevant capacitance is Cj, the depletion/junction/transition capacitance. But you ask, what about at the instant when the MOSFET is turned on? What happened to the charge stored in the diffusion capacitance of the clamp diode? Perhaps the lecturer assumed that all that charge dissipated before the MOSFET turned on. It is hard to tell.

That leaves the capacitance associated with the MOSFET, Cds. It can be tricky to even find books that discuss modelling MOSFETs, but I have one suggestion.

[2] David A. Hodges, Horace G. Jackson; Analysis and Design of Digital Integrated Circuits; McGraw-Hill Book Company; 1983; pp. 52-54. [Note, this book does not use the concept of a diffusion capacitance. Instead, it solves a differenial equation (DE) for the change in the stored charge when the bias of a diode goes from forward to reverse, see pp. 146-149.]

Hodges & Jackson's Fig. 2.6 on p. 53 does not show a Cds, but instead shows a Cdb and Csb, where 'b' refers to the body of the device. The series combination of Cdb and Csb is probably what your lecturer means by Cds. Hodges & Jackson also state that these two capacitances are junction, i.e., depletion capacitances.

I have to run to an appointment. I will continue later.

Regards,

Tom

Hello Lambada Puneeth Raj ,

I have some more information for you. First, there is a practical way to minimize or even eliminate charge storage in the clamping diode, D, in the boost converter. According to the book Gottlieb, the clamping diode (which he refers to as the catcher diode, coasting diode, bypass diode, flywheel diode, free-wheeling diode, or commutating diode) should not be an ordinary silicon diode. Instead, it should be either a fast recovery diode (sometimes called a snap recovery diode), or a Schottky diode. The fast recovery diode is doped with gold, which creates trapping sites in the P and N sides of the PN junction. This trick reduces the lifetime of minority carries, which means that you do not have to sweep all of them out before the diode stops conducting in the forward region. The Schottky diode, on the other hand, is a majority carrier diode so there are no minority carriers to sweep out.

[1] Irving M. Gottlieb; Power Supplies, Switching Regulators, Inverters, and Converters, 2nd Ed.;TAB Books; 1994; pp.237-238 (boost converter) & 268-270 (fast recovery and Schottky diodes). [Note, Gottlieb does not use the term 'boost converter', but you will recognize the circuit topology on p. 238 as the same one in your problem.]

As far as the switching losses are concerned, the book by Hodges and Jackson does provide a solution that sort of mirrors what your lecturer has provided.

[2] David A. Hodges, Horace G. Jackson; Analysis and Design of Digital Integrated Circuits; McGraw-Hill Book Company; 1983; pp. 53 (MOSFET model), 89-90 (linearizing the depletion capacitance), pp. 91-92 (lumping together of all the relevant capacitances), & p. 101 (switching loss).

According to Hodges and Jackson, a proper model of a MOSFET requires five (5) capacitors: Cgb, Cgd, Cgs, Cdb, and Csb, see p. 53. Because these are depletion mode capacitances they are nonlinear functions of the applied reverse voltage difference. A depletion mode capacitance is largest at zero bias, and decreases as the reverse bias increases; the zero bias capacitance is usually referred to as Cj0. They linearize this depeletion capacitance, see pp. 89-90. They then combine (lump together) all the capacitances whose voltage difference changes during a transition of the MOSFET into one capacitance, CT, see pp. 91-92. Finally, in Section 3.5.3 on p. 101 (third sentence), they express the power loss as CTVDD2/2. Note, VDD = Vg, where VDD represents the magnitude of the supply voltage applied to the D (Drain) electrode. VDD is an old convention that was codified in the mid 1960s., see the following book.

[3] Jacob Millman, Christos C. Halkias; Electronic Devices and Circuits; McGraw-Hill Book Company; 1967; pp. 174-175 (text) & 186 (citations).

I am sure you find this explanation to your question as unsatisfactory as I do. If I am able to locate a more logical explanation, I will let you know. Again, I apologize.

Regards,

Tom