Hi Leszek,
Intel has some good numbers on that for inorganic ICs. http://www.intel.com/content/dam/www/public/us/en/documents/presentation/silicon-technology-leadership-presentation.pdf - see slide 16 and 34.
Basically, the only hard limit is the "TDP" where the switched drain currents and the leakage together exceed the power that can be dissipated. At assumed 2V, 200W TDP (about the max) 382 million transistors, the current becomes around 260nA per transistor, but this includes the desired drain current. The goal is between 1/1000 - 1/30000 leakage to drain current., depending on the application.
As you know, an organic FET has much lower breakdown temperatures, so, the number would likely be smaller, I know of no hard data, though.
Hi Leszek,
Intel has some good numbers on that for inorganic ICs. http://www.intel.com/content/dam/www/public/us/en/documents/presentation/silicon-technology-leadership-presentation.pdf - see slide 16 and 34.
Basically, the only hard limit is the "TDP" where the switched drain currents and the leakage together exceed the power that can be dissipated. At assumed 2V, 200W TDP (about the max) 382 million transistors, the current becomes around 260nA per transistor, but this includes the desired drain current. The goal is between 1/1000 - 1/30000 leakage to drain current., depending on the application.
As you know, an organic FET has much lower breakdown temperatures, so, the number would likely be smaller, I know of no hard data, though.
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