To some extent, Yes. Syntx and semantics are more or less similar to C Language. But HDLs are mainly differ from C language in terms of execution. HDL supports concurrency but C program shall execute only sequential pattern. Hence C Language can not be used for modelling hardware behaviour as such
Programming languages (including C and other) have sequential programming structure meaning that the processor executes the instructions as a sequence rated at the processor clock speed, while Hardware Description Language operates in parallel. For instance, a network switch is implemented using ASIC (Application Specific Integrated Circuits) which is the industrial version of the VHDL/FPGA which makes it possible to handle data frames routing (for Gigabit Ethernet/Fiber) at wire-speed. This would be impossible with a sequential programming languages even with low level programming as assembly. As a conclusion it is like comparing hardware speed with software speed. Programming languages create software while HDL creates hardware!
Zoubir Hamici's last sentence is essential. Syntax may be more (Verilog) or less (VHDL) similar to the C but if you write in HDL, you should think of your code as a netlist rather than a program.
One argument that has to be made is that verilog/VHDL languages have a lot of different uses. You can write netlists, testbenches, and RTL in both languages. RTL I would say is the subset of the language that is synthesizable -- if you follow certain templates and rules, you effectively describe hardware. There is no direct equivalent in C. Testbenches are more procedural in nature, and therefore are more similar to a C-like code. End of the day, this is an apples to oranges comparison where the apple only sometimes appears to be an orange (but it really isn't).
There are two very different aspects in this question.
1st: Comparison with respect to the target implementation
2nd: Similarity of languages with respect to their syntax
Some thoughts on the 1st aspect:
Target system for C programming is a processor-based computer. Target system for a hardware description language (HDL) is a digital circuit (either an ASIC or an FPGA/PLD).
But there have been made several approaches to use C for targeting digital circuits (e.g. HandelC, C-to-Hardware from Altium, SystemC, Xilinx HLS and other). By "nature" C is able to model combinational circuits without any problem but lacks the ability to perform clocked processes. Latter has been solved by SystemC libraries for example. With regard to combinational logic you have to detach yourself from the idea that the C-description will be performed in a step-by-step sequence consuming machine cycles. Like in a VHDL "process", which describes combinational logic, a piece of C-code has a sequential "order" but not a "sequential" timing then! Apart from the aspect that also combinational logic takes it's time (in magnitudes of pico- and nanoseconds) a combinational logic expressed by a sequential order inside of a VHDL-process, has an idealized delay time of zero!
Conclusion for the 1st aspect: Yes, C can easily be used to model combinational logic in a sequential order. It depends on the tools you have if you can make a useful digital circuit out of it.
Some thoughts on the 2nd aspect:
I'm not very familiar with Verilog. Therefore I might be wrong in some details.
Verilog's syntax is somehow C-like. VHDL syntax has been derived from the programming language ADA.
VHDL has the possibility to express combinational and sequential logic by means of processes. The entirety of all processes inside a VHDL module will run in parallel (true parallelism). The process can be conditioned to perform continuously (combinational logic) or in time steps (clocked sequential logic). In either case the VHDL-code inside of a process is evaluated in the sequential order as it is written, but in idealized delay time of zero (see above). Delay time in the combinational mode means reaction on change of any input, in clocked mode delay time is related to the active clock edge.
The programming style inside of VHDL processes is very similar to higher software programming languages.
Kind regards
Peter
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