I have involved in CMOS circuit design using Tanner EDA tool, in the work i need to estimate the total power(static and dynamic) consumption of the design. So answers only related to Tanner EDA is appreciable.
Dear Mubarak,
I will give a conceptual answer which can be used with any circuit simulator. In order to determine the power let us return to the basic formula of power,
p= integral of v(t) i(t) dt / T where T is the integration time.
So you need to determine the current drawn by the device of the circuit, the voltage across it ., multiplying them and integrating them at least over one clock cycle.
This power can be divided into static power pst and dynamic power pdy.
P= pst +pdy,
The static power can be divided into the off power poff and the on power Pon. The off power is the power dissipated due to leakage in the off state
Poff= VDD Ioff
The on power is Pon= Von Ion, where Von is the on voltage and Ion is the on current.
The dynamic power is the power consumed during change of state from the on to off and vice versa. It is the switching power. The duration of the the on state is ton , the off state is toff and the duration of the transitions is tron and troff where tron is the transition time from the off to the on sate and troff if the transition time from the on to the off sate.
So if you have a complete waveform for the current and the voltage you can divide its time as dynamic time and static time. Then you can calculate the power as i described before.
Best wishes
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