How can one create a PLL in a microcontroller say operating at 24 MHz so that a FSK (90khz shifted to 100khz) can be demodulated at 4800 baud?

In this FSK the frequency is shifted from 90khz to 100khz. the Baud rate is 4800 or lesser. Noise immunity is important for the final design. Is there any measure of this?

06 November 2015 5,219 5 View