I'm looking for paper or article of most recent source that summarize the device reliability, radiation hardness and temperature (to 150C) based on different silicon technology node from 10nm to 1um.
There too many poor quality article in google search and could not based judgement from them.
I seen FLASH device that come to market and proof it leave the market for short of 4-5 years as they being replaced with shorter topology, ie 100nm to 50nm, which raise concern on device reliability under exposure of radiation and temperature.
I am not aware of a single source that gives an overview over all effects mentioned. For Radiation Hardness, some hints on technology scaling are given in ESCC Handbook on Techniques for Radiation Effects Mitigation in ASICs and FPGAs. This can be found at the ESCIES website
https://escies.org/download/webDocumentFile?id=64426 . It has only a very rough overview on that matter, but following the citations should give you a more comprehensive idea of scaling effects on Radiation hardness.
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