Thank u for your prompt reply madam, still facing some issues;

For example, I have programmed a seven segment display using VHDL and dumped it on the FPGA board. The LED displays is working perfectly. But the only problem is whenever I want to show the pulse waveform in the DSO, I find some kind of noise signal always. Is there any pin configuration settings for the display into DSO? 

Actually, I am new in this domain. Need your valuable guidance @Aparna madam.

I would like to help out.

Can you send your original code sending the seven segment display pulse-wave to the DSO?

Maybe a logic analyzer is a better instrument to check the pulse-waveform.

@Aparna-madam;

Trying for another waveforms. Let's see. 

@Carlos-sir,

Here is the vhdl code I used for seven segment display.

entity seven_segment is

Port ( clk : in STD_LOGIC;

y : out STD_LOGIC_VECTOR (7 downto 0);

sel : out STD_LOGIC_VECTOR (3 downto 0));

end seven_segment;

architecture Behavioral of seven_segment is

type state is (state0,state1,state2,state3,state4,state5,state6,state7,state8,state9);

signal next_state,ps: state := state0;

begin

sel

What is connected to the analog output port ?

"Sine signal is 3.3 Volt of 8 MHz as per the crystal used in FPGA.

Trying for another waveforms."

Try a pulse wave.

I connected a DSO in the analog output port.

Sorry for updating so late. The issue was solved a long ago.

All we need to find the free I/O pins, clock, GND pin number and then set them according to the coding requirement. An external DAC is not required. Usually they are embraced with the FPGA device.

As in my case, to avoid the test-bench I directly programmed through a Spartan-6 device and checked it in a DSO.