hi everyone,
we made surface passivation of TiO2 on Cz silicon wafers. we have totally 6 silicon wafers which are applied rapid thermal anneal at 200,300,400,500,550 C temperatures and non-applied annealing as a reference. we observed max the lifetime values as 0.172, 0.116, 0.265, 0.280, 0.152, 0.026 for the reference and at 200, 300, 400, 500, 550 C, respectively. As you see the lifetime of the reference is higher than wafer at 200 C and higher than at 300 C. I was expecting to see higher results at 200 C either.
Do you have any idea why the lifetime of the sample at 200 C is lower than the reference?
Dear Sir, the analysis and interpretation of this dependence due to the effect of the surface of the Silcon wafers ، as we know the carrier life time is not a constant property but depending on previous thermal treatment and light exposure ,The upper state is obtained by means of low temperature annealing.
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