How carriers will be trapped in the grain boundary in case of intrinsic polysilicon? Will the space charge region there at the adjacent to grain boundary? Please explain anyone. Thank You
Hello Muzaffar,
grain boundaries are structural defects which are characterized by hanging bindings. As a consequence you have a disturbance of the periodic potential V(r). This disturbance (grad V) generates a localized electric field and is therefore electric activ. It attracts electrons (holes) and therefore the neighboured regions are depleted. You can test this electric field by EBIC-(electron beam induced current)measurements in the case of extended boundaries by scanning the grain boundary with an electron beam. The characteristic is that of an npn- or pnp-transistor.
In certain cases if the grain boundary is decorated with impurities you can measure quantum hall effect due to the fact that the boundary behaves like a 2-dimensional system.
With Regard
R. Mitdank
Dear Rüdiger Mitdank,
Thank you so much for very informative input. Still i have some doubts like, as we know that GBs mainly traps majority carriers but what if material is intrinsic? How trapping of majority carriers comes into picture at GBs for intrinsic semiconductor.
With Regards
M. Imam