Possible It may be field transistor, MOFSET transistor, where capacity of gate may change from pressure on it. Moreever this type of transistor has small noise in low frequency.

Dear Michael,

welcome,

In metallic semiconductors, the pressure causes strains in the material which leads to change in the energy band structure specially the energy gap. The energy gap  decreases with pressure. As a CONSEQUENCE, the the intrinsic concentration increases and the minority carrier current. This means the injection increases as the  pressure increases. 

Applying the pressure on vertical transistor will decrease the energy gap of the layers underlying the pressure. That is the emitter, the base and the collector layer. So, the injection current in both directions(sises) of the emitter-base increases. The effect on the collector will be neglected since it is reverse biased.

 In case of the lateral transistor applying the pressure on the base region will enhance only the forward current injection from the emitter to the base. This effect is much like the strained bipolar transistor of the silicon germanide transistors.

This my expectations. It remains to verify it with elaborated analysis or experimental evidence.

Best wishes

To Abdelhalim Zekry!

Thank you very much for the answer!

I would really like to know your opinion about the sensitivity of deformation to the horizontal and vertical structure of the transistor. Should I pay attention to NPN or PNP transistor? Which transistor has the lowest sensitivity of temperature? Are there any features for design with respect to the reaction of deformation and temperature?

Regards, Michael!

Dear Michael,

Not at all.

The sensitivity of the the transistor to the pressure can be defined as S= dIC/dp,

where IC is the collector current and p is the pressure,

So, we can express the collector current in both cases as a function of the technological and physical parameters. For example for the vertical npn transistor:

IC= (A q Dn ni^2/WB) exp VBE/Vt,

with all parameters have their usual meaning. Both Dn and ni^2 are functions of the pressure. Unfortunately they are function of temperature also.

Differentiating the above equation one can get the sensitivity of the collector current to the pressure.

The same can be applied for the lateral transistor.  Then one can compare to the sensitivities. 

From the conceptual point of view, the base width of the vertical transistor can be made much smaller than that of the lateral transistor then i expect that the sensitivity of the vertical transistor be larger than that of the lateral transistor>

I am ready to further discuss the matter with you.

Best wishes

Dear Abdelhalim Zekry!

Thank you very much for the ideas! Initially, I would totally agree with you. In my work (laid out in my profile on Russian "link's message"), it was assumed about a higher effect of deformation on a vertical NPN transistor. But the results of the work Fabiano Fruett https://www.researchgate.net/profile/Fabiano_Fruett/publications indicate a more significant anisotropy effect in an asymmetric horizontal PNP transistor. I'm going to try this proposal myself and study the effect in more detail. What do you think about electrical circuit, which would be most attractive for creating a pressure sensor crystal? This kind of reasoning partially considers Fabiano Fruett in his works.

Regards, Michael!

https://www.researchgate.net/profile/Michael_Basov/project/Sensitive-Element-for-Pressure-Sensor-Based-on-Bipolar-Piezo-transistor/attachment/58ed38431042bf333c67692b/AS:482051506872320@1491941443221/download/Исследование+тензоэффекта+в+кремниевом+биполярном+транзисторе.+Создание+кристалла+датчика+давления+на+основе+тензотранзистора.docx?context=ProjectUpdatesLog

Dear Michael,

i could not read both documents because the language and because of not availability.

One can increase the sensitivity of the pressure sensor by exploiting the anisotropy of the strain. In my first post i pointed out that the strain is in the direction of the stress in the vertical transistor while it is lateral in the lateral transistor when it is applied on the base region.

For the circuit, one can use differential pair configuration to  compensate for the effect of temperature.

Best wishes