There are some open source softwares such as 'degate' to recognize wires, vias, and gates in the chip photos. The recognition rates of the algorithm (based on template matching) for the standard-cell type gates seems so good, however, the recognition rate of wires is not so good. I hope to improve the recognition rate of wires in order to reduce the operations manually drawing wires and constructing nets. Thanks in advance for your attention and interest.