You need Xilinx system generator support in your Matlab toolbox. Then only it is quite easy to design in simulink & convert to vhdl code completely. Refer:

http://www.xilinx.com/support/documentation/sw_manuals/xilinx13_3/sysgen_gs.pdf for more details.

Otherwise, target support packages based code conversion is possible but one cannot expect everything is taken care by the software tool itself. It depends on your design problem. Steps to convert it into vhdl in this mode is available in help menu.

Take a look at this pdf please

http://www.xilinx.com/support/docume...ysgen_user.pdf

at page 38, i guess you'll find what you're looking for

Dear farid kadri sir,

the above link you posted is not working.. Please post it again